The present invention generally relates to laterally diffused metal oxide semiconductor (LDMOS) transistors, and particularly relates to LDMOS transistors having extended drain regions.
LDMOS transistors are typically formed in an epitaxial layer deposited or grown on a semiconductor substrate. An LDMOS transistor has a source region separated from an extended drain region by a channel. The dopant distribution in the channel region is formed by lateral diffusion of dopants from the source side of the channel region, forming a laterally graded channel region. The source region and extended drain region are of the same conductivity type (e.g., n-type) while the epitaxial layer and the channel-region are of the opposite conductivity type (e.g., p-type). A gate actuates the LDMOS transistor. LDMOS transistors are used extensively in RF applications because of their advantageous linearity, power gain and breakdown voltage characteristics.
The extended drain region of an LDMOS device enables the device to withstand high breakdown voltages. The extended drain region includes an elongated drift region extending one or more microns from a highly-doped drain contact region to the channel. The elongated drift region conventionally has a lower conductivity than the highly-doped drain contact region. The elongated drift region drops most of the voltage applied to the drain, thus improving the breakdown voltage tolerance of the LDMOS transistor. The extended drain region may also include a region more lightly-doped than the drift region extending from the drift region to the channel for reducing hot electron injection near the gate region of the transistor. However, high electric fields still arise in the LDMOS transistor, particularly in two regions—laterally along the depletion region formed between the drift region and the p-well region near the channel and also vertically between the drain contact region and the epitaxial layer. High electric fields in these regions of an LDMOS transistor can cause punchthrough, avalanche breakdown, or other destructive effects, thus limiting the breakdown voltage capability of the transistor.
Ideally, at the point of maximum (breakdown) voltage, the extended drain region of an LDMOS transistor is fully depleted of charge carriers. High electric fields in the LDMOS transistor are reduced when the extended drain region is fully depleted. Electric fields in an LDMOS transistor are more evenly dispersed over the length of the extended drain region when the extended drain region is fully depleted. Accordingly, the breakdown voltage of an LDMOS transistor is greatest when the extended drain region is fully depleted. The extended drain region may be depleted by lightly-doping the elongated drift portion of the extended drain. However, a lightly-doped drift region increases the on-state resistance of the LDMOS device which degrades RF performance.
Some previously presented structures provide a more fully-depleted extended drain region. For example, a dopant of the opposite conductivity as the drain may be implanted into the elongated drift region to form a continuous layer of opposite conductivity above the drift region. Previous continuous top layers deplete the extended drift region from above the extended drain region only and reduce the conduction path of the drift region because they extend over the entire width of the drift region. A similar layer may be formed below the elongated drift region, thus depleting the extended drain region from both the top and bottom. In another conventional approach, the continuous top layer is segmented into a plurality of stripes extending in parallel over the length of the drift region, adjacent stripes being separated by the drift region. The stripes extend below the extended drain region into the epitaxial layer or even further into the substrate and thus deplete the drain region from the sides only while further reducing the conduction path of the elongated drift region.